A new programmable timing solution combines multiple clock sources into a single device, simplifying high-speed system design ...
[Oleg Kutkov] decided to build a wideband SDR – for satellite communication research and monitoring, you know, the usual. He decided on a battery of HackRF boards – entire eight of them, in fact. Two ...
Hillsboro, Ore.—Lattice Semiconductor's ispClock5316 and ispClock5320 clock distribution ICs, extensions to the company's ispClock5300S family of in-system programmable, zero-delay, single-ended ...
ON Semiconductor announced the expansion of its high performance ECLinPSTM clock management portfolio with the introduction of two new clock distribution devices for synchronization of memory modules ...
PCIe has been around since 2004. It’s a high-speed serial computer expansion bus specification that replaces older PCI and PCI-X standards. PCIe currently supports the Generation 4 specification. In ...
High-speed communications require system designers to optimize clocking performance while adhering to both performance and cost-budget requirements. When selecting an optimal clock, the developer must ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results